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APT58M50J
500V, 58A, 0.065 Max
N-Channel MOSFET
Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability.
S G D
S
SO
2 T-
27
ISOTOP (R)
"UL Recognized"
file # E145592
APT58M50J
G
D
Single die MOSFET
S
FEATURES
* Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant
TYPICAL APPLICATIONS
* PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters
Absolute Maximum Ratings
Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive
1
Ratings 58 37 270 30 1845 42
Unit
A
V mJ A
Thermal and Mechanical Characteristics
Symbol PD RJC RCS TJ,TSTG VIsolation WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) Package Weight -55 2500 1.03 29.2 10 1.1 0.15 150 Min Typ Max 540 0.23 Unit W C/W C V
2-2007 050-8096 Rev A
oz g in*lbf N*m
Torque
Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com
Static Characteristics
Symbol
VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS
TJ = 25C unless otherwise specified
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 42A VGS = VDS, ID = 2.5mA VDS = 500V VGS = 0V TJ = 25C TJ = 125C
APT58M50J
Typ 0.60 0.055 4 -10 Max Unit V V/C V mV/C A nA
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance
3
Min 500
Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current
3
0.065 5 25 500 100
VGS = 30V
Dynamic Characteristics
Symbol
gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf
4
TJ = 25C unless otherwise specified
Test Conditions
VDS = 50V, ID = 42A VGS = 0V, VDS = 25V f = 1MHz
Parameter
Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related
Min
Typ 65 13500 185 1455 845
Max
Unit S
pF
5
VGS = 0V, VDS = 0V to 333V
Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time
VGS = 0 to 10V, ID = 42A, VDS = 250V Resistive Switching VDD = 333V, ID = 42A RG = 2.2 6 , VGG = 15V
425 340 75 155 60 70 155 50 nC
ns
Source-Drain Diode Characteristics
Symbol
IS ISM VSD trr Qrr dv/dt
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt
Test Conditions
MOSFET symbol showing the integral reverse p-n junction diode (body diode)
Min
D
Typ
Max 58
Unit A
G S
270 1.0 720 20 8 V ns C V/ns
ISD = 42A, TJ = 25C, VGS = 0V ISD = 42A 3 diSD/dt = 100A/s, TJ = 25C ISD 42A, di/dt 1000A/s, VDD = 100V, TJ = 125C
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 2.08mH, RG = 2.2, IAS = 42A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
050-8096
Rev A
2-2007
350 300 ID, DRAIN CURRENT (A) 250 200
V
GS
= 10V
160 140 ID, DRIAN CURRENT (A)
TJ = -55C
APT58M50J
T = 125C
J
V
GS
= 7,8 & 10V
120 100 80 60 40
5V
6V
TJ = 25C
150 100 50 0
TJ = 125C
TJ = 150C
20 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics
NORMALIZED TO VGS = 10V @ 42A
4.5V
0
0
30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
2.5
280 240 ID, DRAIN CURRENT (A) 200 160 120 80 40 0 0
VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE
2.0
1.5
TJ = -55C TJ = 25C TJ = 125C
1.0
0.5
0 25 50 75 100 125 150 0 -55 -25 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 120 100 80 60 40 20 0
8 7 6 5 4 3 2 1 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics
Ciss
20,000 10,000
gfs, TRANSCONDUCTANCE
TJ = -55C TJ = 25C TJ = 125C
C, CAPACITANCE (pF)
1000
Coss
100
Crss
0
10
20 30 40 50 60 70 80 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current
90
500 400 300 200 100 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 0 280 ISD, REVERSE DRAIN CURRENT (A) 240 200 160
TJ = 25C
10
16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12 10 8 6 4 2
ID = 42A
VDS = 100V
VDS = 250V
120 80 40 0 0 2-2007 050-8096 Rev A
TJ = 150C
VDS = 400V
500 400 300 200 100 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0
0
1.5 1.2 0.9 0.6 0.3 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
300 100 ID, DRAIN CURRENT (A)
I
DM
300 100 ID, DRAIN CURRENT (A)
IDM
APT58M50J
10
Rds(on)
13s
100s 1ms 10ms
100ms DC line
10
Rds(on)
13s
100s
1ms
10ms
100ms DC line
1
TJ = 125C TC = 75C
1
TJ = 150C TC = 25C
0.1
1
800 100 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area
0.1
Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125
C
800 100 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 1
TJ (C)
0.0506 Dissipated Power (Watts) 0.0212 0.180 0.511 0.0624
TC (C)
0.118 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction.
0.25 ZJC, THERMAL IMPEDANCE (C/W)
D = 0.9
Figure 11, Transient Thermal Impedance Model
0.20
0.7
0.15
0.5
PDM
ZEXT
0.10
0.3
Note:
t1 t2
0.05
0.1 0.05 SINGLE PULSE
0
Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC
t1 = Pulse Duration
t
10-5
10-1 10-2 10-3 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 10-4
1.0
SOT-227 (ISOTOP(R)) Package Outline
31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322)
W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 11.8 (.463) 12.2 (.480) 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places)
r = 4.0 (.157) (2 places)
4.0 (.157) 4.2 (.165) (2 places)
25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504)
3.3 (.129) 3.6 (.143)
1.95 (.077) 2.14 (.084)
2-2007
14.9 (.587) 15.1 (.594)
* Source
Drain
* Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal.
30.1 (1.185) 30.3 (1.193) 38.0 (1.496) 38.2 (1.504)
Rev A
* Source Dimensions in Millimeters and (Inches)
Gate
050-8096
ISOTOP(R) is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.

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